A five-port deembedding method for floating two-port networks

Radio frequency (RF) high-power bipolar transistors are often constructed with the collector accessible at the bottom of the device. Characterization is carried out on substrate mounted devices. The classical methods developed for the “on wafer” capacitance–voltage (CV) and alternating current (ac) measurement of grounded devices are then no longer applicable. A (general) deembedding algorithm is presented in which the medium surrounding the transistor is taken to be a generic five port and the transistor is treated as a floating two port. Using this approach, one can model a wide variety of configurations, including coupled lines, bondwire complexes with mutual coupling, vias and packages enabling one pass deembedding. Use of this algorithm facilitates an integrated approach improving accuracy and speed. Implementation of the five-port algorithm in HP’s—microwave design software, MDS, and HP’s parameter extraction software, IC-CAP as well as its application to highfrequency power transistor modeling are described.